Non-volatile data storage devices have enabled increased portability of data and software applications. For example, multi-level cell (MLC) storage elements of a flash memory device may each store multiple bits of data, enhancing data storage density as compared to single-level cell (SLC) flash memory devices. As another example, a memory with a three-dimensional (3D) memory configuration may include multiple layers of storage elements, thus increasing data storage density compared to a two-dimensional (2D) (or “planar”) memory device. Consequently, memory devices enable users to store and access a large amount of data.
As data storage density increases, error rates of stored data may also increase (e.g., due to noise and other factors). A data storage device may encode and decode data using an error correcting code (ECC) technique. The ECC technique may enable error correction. In some cases, data stored at the data storage device may include a large number of errors (e.g., due to noise or other factors). In this case, an error rate of data may exceed an error correction capability associated with the particular ECC scheme used by the data storage device, which may result in data loss.
Some data storage devices generate parity information using multiple pages of data, such as by performing an exclusive-OR (XOR) operation between the multiple pages of data. In this case, if one of the multiple pages cannot be decoded due to a large number of errors, the other pages and the parity information may be XORed to recover the page. Such a technique may involve multiple sense operations as well as XOR computations, which may increase latency at the data storage device.